MMIC/RFIC Packaging Challenges

RFIC / MMIC design does not end when the chip layout is complete. Integration of the IC with the module and package (and even the system board) is a huge challenge, and becoming more difficult with the emergence of multi-chip RF modules, and with stacked-die RF modules on the horizon. When integration problems occur at the end of the design cycle, the time and cost required to address these problems can kill the project. This webcast illustrates how these problems can be minimized with an IC-module-package-board co-design methodology, where RFIC / MMIC integration issues are detected early with the use of nonlinear simulation and 3D EM analysis in an integrated design environment.

Who should view this webcast:
Designers of RFICs, MMICs and RF modules

Dónde y cuándo

Presentación para seminario:  MMIC/RFIC Packaging Challenges Slides These slides cover several applications including the Agilent custom TOPS package, Agilent QFN package, solder bumps for FC package, Balun & mixer IC module, and RFIC PA co-design.

2009-08-26

3.79 MB

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