Agilent's Events for United Kingdom and Ireland
Welcome to Agilent's Upcoming Events Page for United Kingdom and Ireland
Agilent Technologies takes part as an exhibitor in numerous parlors and conferences but also organizes free technical seminars in many fields. This list will be updated regularly.
|High Speed Digital Seminars 2013||This seminar will guide you on how to successfully navigate through today’s high speed technology challenges from early design to prototype validation whilst ensuring compliant designs.||Click here|
|Complimentary EMC Training with Agilent and EMSCAN||Learn about EMC measurements, common issues and pitfalls that you should be aware of and how to make cost-effective pre-compliance EMC measurements in your own lab.||28th May||Winnersh||Click here|
|Antenna Testing & Characterisation Workshop||Learn about ways of reducing antenna/RCS measurement times and making precise RF/MW measurements in the field.||29th May||Winnersh||Click here|
|Back to Basics RF and Digital Measurements workshop||
This seminar will improve your understanding of basic RF and digital measurements, including real applications, thus improving your efficiency and effectiveness whether you are in R&D or design & test.
|5th June||Manchester||Click here|
|The PXI Show||The PXI Show is a one-day Technical Seminar and Exhibition focusing exclusively on the world's most popular modular Test, Measurement and Automation platform.||5th June||Towcester||Click here|
|Your LTE Devices Need to Pass Conformance Tests – Now What?||Conformance Testing is required to verify that global products meet international standards to ensure interoperability. This paper provides an overview of the LTE conformance process and a detailed analysis of the LTE RF Test Requirements from conformance and pre-conformance test perspectives.||23rd May||Click here|
|Multi-antenna Array Measurements Using Digitizers||
The discussion will cover: calibrating a digitizer-based system for matched cross-channel magnitude and phase, using digital down-conversion for optimizing the system sensitivity at the required bandwidth, and algorithms used on the resulting complex signals necessary to achieve measurement results of cross-channel (between antennas) phase and gain. At the conclusion of the paper, a representative system configuration will be described with measurement results derived from the techniques presented. .
||29th May||Click here|
|USB 3.0 Physical Layer Test Challenges: Gen3 and beyond||In this webcast we will provide a USB 3.0 industry update as well as cover the latest physical layer compliance testing requirements and challenges for USB 2.0 and USB 3.0. Also, the USB 3.0 specification now includes several Engineering Change Notices (ECNs). We will review those that impact physical layer testing like SSC limits, interference issues, channel definition changes and describe the test method changes that will be required to meet the new requirements.||12th June||Click here|
|Innovations in EDA: Beyond CMOS vs. GaAs – Finding the Best Technology Mix for a Handset PA||This webcast will explore two very different technology mixes for a handset PA Module, one is built around a CMOS PA core, while another is built around a GaAs PA core. Technology implications and design techniques will be discussed, and tradeoffs will be illustrated using unique aspects of the multi-technology flow in ADS.||13th June||Click here|
|MIMO Over the Air (OTA) Handset Performance and Testing||
This webcast will summarize the current test methods and results from the latest inter-lab / inter-technique test campaign being carried out by CTIA with a look towards the remaining work prior to release of new standards.
|27th June||Click here|
|PCI Express® 3.0 Compliance – Successfully Navigating the Standard||
This presentation will provide you with an overview of the latest developments in the PCI Express 3.0 standard, including new methods for validating transmitter jitter, transmit de-emphasis and preshoot, equalization parameters, and the effects of de-embedding on PCI Express compliance measurements. We will also discuss key considerations for receiver jitter stress testing at both the component and system level. Lastly, this presentation will provide instruction on how to accelerate PCI Express 3.0 testing using a 26GHz high speed switch to multiplex your DUT signals into your test instrumentation.
||10th July||Click here|