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Building Hybrid Test Systems. Ensuring success in two common development scenarios - Application Not
Application Note 1465-33. When you migrate to a hybrid system that includes LXI along with GPIB, VXI, PXI, or any other architecture, two scenarios are most typical, minimum development time and maximum overall performance
Application Note 2008-10-15 |
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High Node Count Fixturing Solutions for Agilent Short-Wire Test Fixtures
This paper discusses problems encountered in building large, high node count vacuum actuated test fixtures for the Agilent 3070 family of board test systems.
Application Note 2008-04-30 |
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Maximising Test Coverage with Agilent Medalist VTEP v2.0
This paper describes how to get the most from Agilent Technologies’ industry-leading vectorless test innovation, the Medalist VTEP v2.0 which is a suite of solution comprising VTEP, iVTEP and NPM.
Application Note 2007-04-17 |
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Life and Stability of the Agilent 5DX Sealed X-ray Tube
Agilent has developed a sealed ultra-high vacuum X-ray tube that provides stable output throughout a significantly long life.
Application Note 2007-01-22 |
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Considerations for Surface Map Setup
The concept of delta-Zs is perhaps the most difficult thing to understand about the surface map process.
Application Note 2006-08-08 |
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AOI - A Strategy for Closing the Loop
This paper describes a set of defect prevention solutions centered on the availability of high-quality inspection and measurements data from an AOI system and a few carefully engineered software applications
Application Note 2006-04-16 |
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“Shotgunning”, a Bad Fit for Lead-Free Test
Shotgunning, a common repair technique in functional test, will be negatively affected by lead-free processes. This article explores the technique and draws broad conclusions regarding the impact of lead-free on electronics manufacturing test
Application Note 2006-02-07 |
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In-circuit Testing of Low Voltage Devices
Core technical document summarizing issues regarding the testing of low voltage devices on the 3070 and i5000, including updated Safeguard information.
Application Note 2005-05-25 |
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Test and Inspection as Part of the Lead-free Manufacturing Process
The paper addresses issues that will impact defect levels and defect spectrum during the transition to lead-free manufacturing. It also addresses different test and inspection systems’ readiness to test lead-free printed circuit board assemblies.
Application Note 2005-02-22 |
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Instructions for Using One Confirmation and Adjustment Panel with Multiple Systems
Readjusting the thickness table setting for one machine, using the Confirmation and Adjustment Panel, and adjustment data for a second machine, improves the portability of applications between the two machines.
Application Note 2004-08-26 |
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The Importance of Test and Inspection When Implementing Lead-Free Manufacturing
Many papers, articles, and studies have been written about process issues, reliability issues, repair issues, and the merits of different alloys. This paper addresses the impacts on test and inspection when going lead-free.
Application Note 2004-08-20 |
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Using Lead-Free PCB Finishes at Manufacturing In-circuit Test Stage
The purpose of this document is to share experiences and educate engineers regarding different PCB surface finishes and the specific changes required in the PCB build process to allow for ICT.
Application Note 2004-08-08 |
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Solder Paste Inspection - Organize the Pieces
Published in Global SMT & Packaging, November 2003
Application Note 2003-11-01 |
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Realizing the Benefits of 3D Inline Solder Paste Inspection
Published in SMT Magazine/Germany, August 2003
Application Note 2003-08-01 |
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Test Coverage: What Does It Mean when a Board Test Passes?
Originally presented at the 2002 International Test Conference -- Characterizing board test coverage as a percentage of devices or nodes having tests does not accurately portray coverage, especially in a limited access testing environment.
Application Note 2003-07-28 |
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3D Inline Solder Paste Inspection - Benefit Realized
100% solder paste inspection helps to reduce the contribution from the print process to solder joint defects.
Application Note 2003-06-01 |
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Solder Paste Inspection for the SMT line: 3D In-line Systems Come of Age
Published in Electronic Production & Test, May 2003.
Application Note 2003-05-01 |
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Testing Transformers on Unpowered Systems
This paper explains how to test basic analog parts, using unpowered systems.
Application Note 2003-03-21 |
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Boundary Scan Helps EMS Companies Cut Test Costs and Increase Revenues
Electronics Manufacturing Services (EMS) providers can utilize boundary-scan to reduce test cost expenses and also generate additional revenue opportunities.
Application Note 2003-03-01 |
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PLR and 5DX Customized Defect Names Implementation
You can use customized defect names on both the 5DX and on the PLR. This is particularly valuable when you want to display defect names in a local language.
Application Note 2003-03-01 |
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What to Consider When Selecting the Optimal Test Strategy
This paper addresses several issues for selecting the optimal inspection strategy, presenting data from many studies that Agilent has performed in the quest to find the optimal test / inspection strategy.
Application Note 2003-03-01 |
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Using Boundary Scan to Link Design and Manufacturing Test
By leveraging boundary-scan tests generated in Design and re-using them at Manufacturing Test, manufacturers can produce long-term benefits in terms of lower costs, greater efficiencies and higher quality products.
Application Note 2003-03-01 |
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System Issues in Boundary-Scan Board Test
While Boundary-Scan is a powerful test tool, test engineers are finding out that yesterday's DFT rules and test approaches may actually be detrimental to successfully testing systems on a board.
Application Note 2003-01-28 |
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Design for Testability - Test for Designability
This paper addresses testability considerations, both physical and logical, and focuses on both the new constraints and the new freedoms of modern manufacturing test in the ever-changing challenge.
Application Note 2003-01-28 |
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Ground Bounce Basics and Best Practices
This article offers a description of the physical properties that result in ground bounce during board test.
Application Note 2003-01-28 |
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