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1-25 of 27
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Press Releases for N5990A
Press Releases for N5990A
Press Materials 2013-05-06 |
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PCI Express Design and Test - From Electrical to Protocol
Agilent's PCI EXPRESS® brochure will explain basic differences between Gen1, Gen2, and Gen3 as well as the full breadth of Agilent's PCIe solutions.
Brochure 2012-01-17 |
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N4916B De-emphasis Signal Converter Data Sheet
The N4916B de-emphasis signal converter enables R&D and test engineers to accurately characterize gigabit serial ports and channels. The clock doubler option is needed to analyze half-rate clock devices.
Data Sheet 2011-04-13 |
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HDMI and DisplayPort Design and Test - A Better Way Brochure
Brochure covering Agilent's HDMI and Displayport test solutions portfolio and applications, discussing measurement challenges and showing how the test solutions and services address these.
Brochure 2010-05-20 |
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Serial ATA Design and Test - A better way
Agilent's SATA test solutions portfolio and applications, discussing measurement challenges and showing how the test solutions and services address these.
Brochure 2009-12-08 |
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Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.
Application Note 2009-03-24 |
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Method of Implementation (MOI) for DisplayPort Sink Compliance Test
Method of Implementation (MOI) for DisplayPort Sink Compliance Test
Application Note 2008-08-18 |
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Jitter Solutions for Telecom, Enterprise, and Digital Designs
Complete solutions for characterization and test of jitter in high-speed digital transmission systems, high-speed I/O connections, and buses.
Brochure 2008-06-25 |
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Measuring Jitter in Digital Systems (AN 1448-1)
Measuring jitter and how to calculate total jitter.
Application Note 2008-01-30 |
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Complete solutions for characterization, debug, compliance test of HDMI designs
This brochure discusses test solutions for HDMI. Thorough characterization and validation of HDMI-based designs
Brochure 2007-10-19 |
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How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)
How to characterize the Physical Layer of the Mobile Industry Processor Interface (MIPI D-PHY)
Application Note 2007-07-30 |
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Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices
Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices
Application Note 2007-06-19 |
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Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A
Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A Software Platform: 8 pages
Application Note 2007-01-31 |
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HDMI Sink and Source Compliance Test and Characterization
In this product note examples are given for advanced, automated HDMI compliance tests and characterization based on a high bandwidth oscilloscope, a TMDS Signal Generator and the Test Automation Software Platform.
Application Note 2006-10-27 |
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Automated PCI Express Receiver Compliance Test and Characterization with N5990A
This product note shows how to use the test automation software platform to verify and debug your PCI Express bus designs. As an example, a multi-lane add-in card is used.
Application Note 2006-08-29 |
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Calibrated Jitter, Jitter Tolerance Test and Jitter Laboratory with the Agilent J-BERT N4903A
This application note describes the N4903A BERT characterization solution for emerging serial gigabit devices: it helps engineers make quick and accurate jitter tolerance tests, which have been complicated and hard to do in the past.
Application Note 2006-07-18 |
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Mastering Jitter in Serial Gigabit Designs
Mastering Jitter in Serial Gigabit Designs
Promotional Materials 2006-06-22 |
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PCIe Revision 2 Receiver Jitter Tolerance Testing with J-BERT N4903B
This document focuses on physical layer testing of the transmitter (TX) and receiver (RX) ports of PCI EXPRESS® (PCIe) devices.
Application Note 2006-01-30 |
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Eye Characterization on Idle and Framed Data Traffic: the Bit Recovery Mode
Traditionally, bit error rate testing compares the bits from a Device Under Test (DUT) against a reference data set, called the expected data. The user of Bit Error Ratio Tester (BERT) has to provide this expected data and load it into the tester.
Application Note 2005-09-21 |
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Fast Total Jitter Test Solution
This application note compares different total jitter measurement and extrapolation techniques to the Fast Total Jitter Measurement
Application Note 2005-08-29 |
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PCI Express Receiver Design Validation Test with 81134A / 81250A
Describes functional validation and compliance and stress tests for PCI Express receiver design
Application Note 2005-03-18 |
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Flat Panel Display Link Test
This Product Note shows how to verify the Bit Error Rate (BER) of 1-serial to 7-parallel Rx chip with the Agilent 81250 Parallel Bit Error Ratio Tester (ParBERT).
Application Note 2004-07-29 |
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Jitter Fundamentals: Jitter Tolerance Testing with Agilent ParBERT 81250
This applicaiton note describes gain fast and efficient insight into the operation and performance of CDR, clock system and jitter tolerance.
Application Note 2003-12-02 |
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Finding Sources of Jitter with Real-Time Jitter Analysis (AN 1448-2)
This application note describes how to use a real-time oscilloscope with jitter analysis, along with the stimulus-response techniques, to meet the critical time-correlation requirement to relate jitter trend measurement results to measured signals.
Application Note 2003-06-30 |
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Jitter Analysis Techniques for High Data Rates (AN 1432)
This new application note describes the basic jitter measurements and the specific measurement techniques used in SONet/SDH/OTN and Gigabit Ethernet applications.
Application Note 2003-02-03 |
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