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Agilent MOI for SATA RSG Tests, SATA Interoperability Program rev. 1.4 - Sep 2009
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2009-10-26
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444 KB
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Automated PCI Express Receiver Compliance Test and Characterization with N5990A
This product note shows how to use the test automation software platform to verify and debug your PCI Express bus designs. As an example, a multi-lane add-in card is used.
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2006-08-29
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272 KB
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Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A
Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A Software Platform: 8 pages
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2007-01-31
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5.32 MB
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Calibrated Jitter, Jitter Tolerance Test and Jitter Laboratory with the Agilent J-BERT N4903A
This application note describes the N4903A BERT characterization solution for emerging serial gigabit devices: it helps engineers make quick and accurate jitter tolerance tests, which have been complicated and hard to do in the past.
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2006-07-18
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1.95 MB
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Calibrating optical stress signals for characterizing 10 Gb/s optical transceivers
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2008-06-10
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2.08 MB
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De-Emphasis Application Note
The N4916A de-emphasis signal converter, an industry-first, enables engineers to accurately characterize multi-gigabit serial receivers and channels that operate with de-emphasized signals.
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2007-09-20
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2.92 MB
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De-Emphasized Signal Generation with the 81250A ParBERT - Application Note
This application note covers the basics of de-emphasized signal generation while considering the possible application and testing situations best suited for the 81250A ParBERT.
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2009-01-15
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356 KB
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Eye Characterization on Idle and Framed Data Traffic: the Bit Recovery Mode
Traditionally, bit error rate testing compares the bits from a Device Under Test (DUT) against a reference data set, called the expected data. The user of Bit Error Ratio Tester (BERT) has to provide this expected data and load it into the tester.
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2005-09-21
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1.27 MB
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Fast Total Jitter Test Solution
This application note compares different total jitter measurement and extrapolation techniques to the Fast Total Jitter Measurement
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2005-08-29
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606 KB
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Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P
This document describes the requirements for forward clocking topology RX Jitter tolerance testing.
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2009-03-24
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431 KB
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HDMI Sink and Source Compliance Test and Characterization
In this product note examples are given for advanced, automated HDMI compliance tests and characterization based on a high bandwidth oscilloscope, a TMDS Signal Generator and the Test Automation Software Platform.
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2006-10-27
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3.18 MB
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Jitter Fundamentals: Jitter Tolerance Testing with Agilent ParBERT 81250
This applicaiton note describes gain fast and efficient insight into the operation and performance of CDR, clock system and jitter tolerance.
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2003-12-02
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1.86 MB
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Method of Implementation (MOI) for DisplayPort Sink Compliance Test
Method of Implementation (MOI) for DisplayPort Sink Compliance Test
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2008-08-18
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00.97 MB
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PCI Express® Revision 2 - Receiver Testing With J-BERT N4903A and 81150A Pulse
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2008-12-03
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591 KB
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The Benefits of and Considerations for the Embedded CDR in the N5980A
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2008-09-16
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348 KB
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Upgrade to PCI Express 2.0© Receiver Test
The 15431A is a filter set for the 81150A. It generates the random jitter profile for testing PCI Express 2.0 receivers, to be used in conjunction with the N4903A. This fact sheet explains the upgrade.
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2008-10-24
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214 KB
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Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices
Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices
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2007-06-19
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