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  - Oscilloscopes, Analyzers, Meters
    - Bit Error Ratio Test (BERT) Solutions
      - Serial BERTs
        
        N4903B J-BERT high-performance serial BERT up to 7 Gb/s and 12.5 Gb/s with complete jitter tolerance (6)

1-11 of 11

Forward Clocking - Receiver (RX) Jitter Tolerance Test with J-BERT N4903B High-P This document describes the requirements for forward clocking topology RX Jitter tolerance testing. Application Note 2009-03-24	PDF 606 KB
Method of Implementation (MOI) for DisplayPort Sink Compliance Test Method of Implementation (MOI) for DisplayPort Sink Compliance Test Application Note 2008-08-18	PDF 1.87 MB
Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices Using Receiver Tolerance Testing to Assess the Performance of High-Speed Devices Application Note 2007-06-19	PDF 214 KB
Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A Automated USB 2.0 Receiver Compliance Test and Characterization with the Agilent N5990A Software Platform: 8 pages Application Note 2007-01-31	PDF 272 KB
HDMI Sink and Source Compliance Test and Characterization In this product note examples are given for advanced, automated HDMI compliance tests and characterization based on a high bandwidth oscilloscope, a TMDS Signal Generator and the Test Automation Software Platform. Application Note 2006-10-27	PDF 431 KB Languages English \| 2006-10-27 \| PDF 431 KB 日本語 \| 2006-05-19 \| PDF 872 KB
Automated PCI Express Receiver Compliance Test and Characterization with N5990A This product note shows how to use the test automation software platform to verify and debug your PCI Express bus designs. As an example, a multi-lane add-in card is used. Application Note 2006-08-29	PDF 444 KB
Calibrated Jitter, Jitter Tolerance Test and Jitter Laboratory with the Agilent J-BERT N4903A This application note describes the N4903A BERT characterization solution for emerging serial gigabit devices: it helps engineers make quick and accurate jitter tolerance tests, which have been complicated and hard to do in the past. Application Note 2006-07-18	PDF 5.33 MB
PCIe Revision 2 Receiver Jitter Tolerance Testing with J-BERT N4903B This document focuses on physical layer testing of the transmitter (TX) and receiver (RX) ports of PCI EXPRESS® (PCIe) devices. Application Note 2006-01-30	PDF 1.31 MB Languages English \| 2006-01-30 \| PDF 1.31 MB 中文（简体） \| 2009-04-01 \| PDF 737 KB 中文（繁體） \| 2009-05-18 \| PDF 1.44 MB
Eye Characterization on Idle and Framed Data Traffic: the Bit Recovery Mode Traditionally, bit error rate testing compares the bits from a Device Under Test (DUT) against a reference data set, called the expected data. The user of Bit Error Ratio Tester (BERT) has to provide this expected data and load it into the tester. Application Note 2005-09-21	PDF 356 KB
Fast Total Jitter Test Solution This application note compares different total jitter measurement and extrapolation techniques to the Fast Total Jitter Measurement Application Note 2005-08-29	PDF 1.28 MB
Jitter Fundamentals: Jitter Tolerance Testing with Agilent ParBERT 81250 This applicaiton note describes gain fast and efficient insight into the operation and performance of CDR, clock system and jitter tolerance. Application Note 2003-12-02	PDF 3.18 MB