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Characterizing Clock Jitter through Phase Noise Measurements Speeds up Design Verification Process
This white paper discusses a new measurement method for obtaining highly accurate low random jitter (RJ) measurements and performing real-time analysis of RJ and periodic jitter (PJ) of components.

Application Note 2008-11-20

PDF PDF 688 KB
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Signal Integrity Analysis Series Part 3: The ABCs of De-Embedding
This Application Note focuses on Part 3: The ABCs of De-Embedding explaining different de-embedding techniques & shows how to minimize fixture effects for best results.

Application Note 2007-07-01

PDF PDF 2.44 MB
Signal Integrity Analysis Series Part 2: 4-Port TDR/VNA/PLTS
This Application Note focuses on part 2: those which use a 4-port TDR/VNA/PLTS.

Application Note 2007-02-21

PDF PDF 2.75 MB
Signal Integrity Analysis Series Part 1: Single-Port TDR, TDR/TDT, & 2-Port TDR
This Application Note focuses on part 1: those which use a single-port TDR, those which use TDR/TDT, and those which use 2-port TDR.

Application Note 2007-01-01

PDF PDF 3.50 MB
Using Clock Jitter Analysis to Reduce BER in Serial Data Applications
This Application Note emphasizes on the emerging techniques for reference clock jitter analysis from the perspective of oscillator physics, phase noise theory, and serial data technology.

Application Note 2006-12-01

PDF PDF 1.15 MB
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PCI Express Tools

Brochure 2006-10-02

PDF PDF 1000 KB
Designing High Speed Backplanes Utilizing Physical Layer Test System
This Application Note focuses on the problems introduced into the backplane assembly design by the many linear passive components that create reflections due to impedance discontinuities.

Application Note 2006-01-18

PDF PDF 1.24 MB
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Limitations and Accuracies of Time and Frequency Domain Analysis of Physical Layer Devices

Application Note 2005-11-01

PDF PDF 2.83 MB
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Optimizing VCO/PLL evaluations and PLL synthesizer designs AN 1330-1
This application note clarifies the role and performance requirements of the synthesized oscillator used in wireless communication equipment, and introduces our test solution for VCO/PLL evaluation.

Application Note 2000-09-01

PDF PDF 1.04 MB
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