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Design and Measurement of a 400 MHz Frequency Synthesizer: Accuracy Proof
This Application Note explains the 400 MHz PLL design with examples and hence giving the engineer a powerful effective tool for designing real PLLs.
應用手冊 2001-11-01 |
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PLL’s using a Charge Pump, High Divide-by-N Factors, and Decimation before Plotting
This Application Note shows an approach for designing a phase locked loop (PLL) that uses a charge pump, High Divide-by-N Factors, and Decimation before Plotting.
應用手冊 2001-03-20 |
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Phased Locked Loop Acquisition Using a Swept Local Oscillator
This Application Note details the Phased Locked Loop Acquisition Using a Swept Local Oscillator.
應用手冊 2000-03-02 |
