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Quickly Validate Designs for DOCSIS 3.1 Compliance - Application Brief
This “DOCSIS 3.1 Test Solution" app brief gives insight into Agilent solutions that can be used for testing DOCSIS 3.1 transmitters, receivers and components.

Application Note 2014-06-24

PDF PDF 746 KB
An Innovative Simulation Workflow for Debugging High-Speed Digital Designs Using Jitter Separation
This paper presents a new simulation workflow for jitter separation analysis.

Application Note 2013-06-06

Frequency Domain Analysis of Jitter Amplification in Clock Channels
Clock channel jitter amplification factor in terms of transfer function or S-parameters is derived. Amplification is shown to arise from smaller attenuation in jitter lower sideband than in the fundamental. Amplification scaling with loss is obtained.

Application Note 2012-11-01

PDF PDF 257 KB
Explore the SERDES Design Space Using the IBIS AMI Channel Simulation Flow
Simulation of modern chip-to-chip links requires you abandon the SPICE-based approach and adopt a new approach based on an IBIS AMI channel simulation flow.

Application Note 2012-09-21

Which Electromagnetic Simulator Should I Use?
This paper outlines three of the key EM simulation technologies, MoM, FEM, FDTD and attempt to compare and contrast the relative merits of each.

Application Note 2012-04-06

PDF PDF 3.21 MB
Simulating FPGA Power Integrity Using S-Parameter Models
This application note describes how self-impedance (frequency) can easily be determined by simulating the frequency domain self-impedance profile of a Power Distribution Network (PDN).

Application Note 2012-04-02

Simulating High-Speed Serial Channels with IBIS-AMI Models
This paper reviews some of the benefits and limitations of using IBIS models and introduces the new AMI extensions to the latest IBIS version 5.0 specification.

Application Note 2011-11-15

Using ADS for Signal Integrity Optimization
This white paper shows how to replace a multi-dimensional sweep of a long running PRBS time-domain simulation (including manual data evaluation) by short, channel-pulse characterization in the Advanced Design System to efficiently optimize a channel.

Application Note 2009-10-19

Signal Integrity Analysis Series Part 3: The ABCs of De-Embedding
This Application Note focuses on Part 3: The ABCs of De-Embedding explaining different de-embedding techniques & shows how to minimize fixture effects for best results.

Application Note 2007-07-01

PDF PDF 2.44 MB
Signal Integrity Analysis Series Part 2: 4-Port TDR/VNA/PLTS - Application Note
This Application Note focuses on part 2: those which use a 4-port TDR/VNA/PLTS.

Application Note 2007-02-21

PDF PDF 2.75 MB
Signal Integrity Analysis Series Part 1: Single-Port TDR, TDR/TDT, & 2-Port TDR - Application Note
This Application Note focuses on part 1: those which use a single-port TDR, those which use TDR/TDT, and those which use 2-port TDR.

Application Note 2007-01-01

PDF PDF 3.50 MB
Using Clock Jitter Analysis to Reduce BER in Serial Data Applications
This Application Note emphasizes on the emerging techniques for reference clock jitter analysis from the perspective of oscillator physics, phase noise theory, and serial data technology.

Application Note 2006-12-01

Designing High Speed Backplanes Utilizing Physical Layer Test System
This Application Note focuses on the problems introduced into the backplane assembly design by the many linear passive components that create reflections due to impedance discontinuities.

Application Note 2006-01-18