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Fault Detective Case Study #1 Presentation
4 slide presentation that summarizes Agilent employing its test optimization software to improve the quality and yield of its RF printed circuit assemblies.

案例研究 2005-09-26

PDF PDF 72 KB
Be generous with tests (Slösa med testerna)
Written by Stig Oresjo, Agilent Technologies. This article discusses the use of AOI for success in lead-free since the lead-free process is less forgiving, than tin-lead. Note that the article is in Swedish.

專文 2005-08-31

用於氣候模擬箱 (climatic chamber) 的自動測試 VEE Pro
ISSeP (比利時) 使用 VEE Pro 開發出自動系統,以分析氣候模擬箱、培養箱和冷凍裝置的特性。

案例研究 2005-05-09

PDF PDF 238 KB
用於材料特性分析的 VEE Pro
ONERA (法國) 使用寫入 VEE Pro 中的自動測試設定,分析太空國防材料的 EM 吸收與反射特性。

案例研究 2005-05-09

PDF PDF 591 KB
End of Support Letters
Good business decisions start with good information, which is why we communicate with customers twice a year about our latest Support Life Policies.

專題報導 2005-04-18

Selcom Testimonial
Customer testimonial which discusses the advantages gained from using the Agilent Medalist Family of test and inspection systems.

案例研究 2005-03-14

WMF WMF 19.21 MB
AXI Conquers Hidden Joint Defects
Written by Jeremy Jessen, Agilent Technologies. Published In SMT magazine, February 2005.

專文 2005-02-01

PDF PDF 134 KB
Traceable Calibration for 3070
As test equipment ages, system performance degrades. Agilent can help protect your investment with NIST traceable system calibration.

專題報導 2004-12-13

Using AOI to Verify IPC Compliance
Written by Malachy Rice, Ph.D, Agilent Technologies. Appeared in Machine Vision supplement of Test & Measurement World, November 2004.

專文 2004-11-01

Solid Shape Modeling - Working Towards 3-D AOI
Written by Xuemei Zhang and Gareth Bradshaw, Agilent Technologies. Published in Surface Mount Technology magazine, November 2004.

專文 2004-11-01

Controlling PB-Free Processes Through AOI
Written by Thorsten Niermeyer, Agilent Technologies. Article and cover published in Circuits Assembly, October 2004.

專文 2004-10-01

3D Techniques in SMT Test
By Malachy Rice, Ph.D, Stacy Johnson and Glen Leinbach, Agilent Technologies. Published by EE - Evaluation Engineering, February 2004.

專文 2004-09-28

Utilizing VEE for Data Collection in Surface and Undersea Research
Utilizing VEE for Data Collection in Surface and Undersea Research

案例研究 2004-05-27

PDF PDF 130 KB
Pins Test Detects Bondwire Failures
Recently, a high volume 3070 user came across a batch of devices with bad bondwires from the chip vendor. The symptom at ICT was failing "pins" tests (sometimes known as "Chek-Point").

案例研究 2004-05-26

PDF PDF 53 KB
Vectorless Test EP (VTEP) Goes Head-to-Head with Agilent TestJet
In beta tests, VTEP proved its abilities to improve in-circuit test coverage by over 80 percent compared to Agilent TestJet, especially on boards with hard-to-test packages such as BGAs, micro-BGAs, and SMT edge connectors.

案例研究 2003-12-16

PDF PDF 351 KB
Selcom Group Uses Integrated Test to Cut Costs and Increase Business
Selcom Group uses a combination of test technologies from Agilent to meet stringent cost, quality, and shipping targets, allowing Selcom to continue growing and thriving in a difficult worldwide economy.

案例研究 2003-10-24

PDF PDF 600 KB
Step-by-Step Series: Step 9 -Test and Inspection
Written by Stig Oresjo, Agilent Technologies. Published in SMT, October 2003.

專文 2003-10-01

Agilent Quality Tool Testimonials
Learn what users have to say about Agilent Quality Tool.

案例研究 2003-09-30

ScanWorks Reduces Vivace Networks' ICT Costs and Improves Board Quality
This paper discusses how Vivace Networks uses ScanWorks at the benchtop and at in-circuit test to reduce test costs and accelerate time to market in a competitive environment.

案例研究 2003-07-31

PDF PDF 29 KB
Lucent Demonstrates how ScanWorks for the Agilent 3070 Can Save Nearly $1 Million Per Year
Lucent has demonstrated that reusing ScanWorks boundary-scan tests on the 3070 ICT platform can produce dramatic cost savings through lower test development and fixture costs without giving up test coverage.

案例研究 2003-07-23

PDF PDF 222 KB
Selecting the Optimal Test Strategy
Written by Stig Oresjo, Agilent Technologies. Published in Circuits Assembly, July 2003.

專文 2003-07-01

3D Inline SPI
PCB PULSE ARTICLE: Solder paste printing can account for up to 80 percent of all board defects. A new article by Stacy Kalisz Johnson describes how the Agilent SP50 hits that big target at two assembly houses that test fine pitch devices.

專題報導 2003-06-20

Motorola Drives Reliability and Productivity of In-Car Safety Systems with the Agilent 3070
To maintain rigorous testing without hindering assembly line productivity, Motorola chose the Agilent 3070 In-circuit Test System.

案例研究 2003-06-03

PDF PDF 2.01 MB
ScanWorks Completes Successful Assessment at Jabil Circuit
One of the first places electronics manufacturers look to reduce expenses is through the elimination of redundant effort.

案例研究 2003-03-21

PDF PDF 661 KB
AwareTest xi Case Study #1
This case study compares a fully-probed in-circuit test on a conventional high node count test system with a combined x-ray/in-circuit test strategy, using the simplified in-circuit test.

案例研究 2003-02-15

PDF PDF 127 KB

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